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SA5901
4-CHANNEL MOTOR DRIVER FOR PORTABLE CD PLAYER
DESCRIPTION
SA5901 is suitable for portable CD player with 4-ch H bridge drivers and DC/DC converter control circuit. Because of the small package QFP44, it is most suitable for small equipment.
QFP44-10 x10-0.8
FEATURES
Four channels of H-bridge drivers are contained. DC/DC converter control circuit is contained. Reset circuit Reduced voltage detection circuit. Battery charging circuit General purpose operational amplifier is contained Low power consumption Thermal shutdown circuit QFP-44 package Load drive voltage can be processed by PWM control through an external component. Excellent gain can be obtained by a voltage feedback circuit. Mute function is disabled for ch1, ch2 and ch3/ch4 respectively. Starter and power off function Soft-start function and short-circuit protection function Self-advancing oscillation and clock synchronization are available. Reset voltage is interlocked with the set voltage of DC/DC converter. Inversion output pin for reset output is available. Battery charger and dry battery allow to switch " Empty" detection level.
LQFP44-10 x10-0.8
ORDERING INFORMATION
Device SA5901A SA5901L Package QFP44-10 X 10-0.8 LQFP44-10 X 10-0.8
Constant current battery charging system allows varying current value through resistance. It is separated from any other blocks and it can be operated independently. A charging power transistor is contained. Independent thermal shutdown circuit is contained.
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SA5901
BLOCK DIAGRAM
41 35 34 36 32 31 30 29 28 27 26 25 24 23
37
PSW
Max. Detection
4-ch H Bridge Driver
MUTE2 MUTE34
21 19 22 20 17 18 13 15 12
START
39
OFF
IN1 System On/Off Pre Amp IN2 IN3 IN4
40
RCHG
33
SEL
42 43 PREGND
Charge & Voltage DET SPRT Over Voltage
OPOUT
44 PWMFIL 10 N.C 16
VREF DC/DC Convertor Triangle Wave -+ VSYS2 VSYS1
1
2
3
4
5
6
7
8
9
38 11
14
ABSOLUTE MAXIMUM RATING (Tamb=25C, unless otherwise specified)
Characteristic Supply voltage Driver output current Power dissipation Operating temperature range Storage temperature range Symbol VCC IO PD Topr Tstg Ratings 13.5 500 625 (note) -30~85 -55~150 Unit V mA mW C C
Note: derating is done at 5mW/C for operating above Tamb=25C.
RECOMMENDED OPERATING CONDITION
Characteristics Control circuit power supply voltage Pre-driver power supply voltage H-bridge power supply voltage Power unit power supply voltage Charging circuit power supply voltage Ambient temperature Symbol VSYS1 VSYS2 HVCC BATT CHGVCC Tamb Min. 2.7 2.7 -1.5 3.0 -10 Typ. 3.2 3.2 PWM 2.4 4.5 2.5 Max. 5.5 5.5 BATT 8.0 8.0 70 Unit V V V V V C
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SA5901
ELECTRICAL CHARACTERISTICS (Unless otherwise specified ,Tamb=25C, BATT = 2.4V ,
VREF=1.6V,VSYS1=VSYS2=3.2V, CHGVCC=0V,fCLK=88.2KHz) Characteristics Common section BATT stand-by current BATT supply current at no-load VSYS1 supply current at no-load VSYS2 supply current at no-load CHGVCC supply current at noload H-bridge driver section GVC134 Voltage CH1,3,4 gain CH2 GVC2 Gain error by polarity GVC RIN134 IN=1.7 and 1.8 RIN2 VOUT RL=8, IN=0-3.2V HVCC=BATT=4V, 21.5 23.5 24.5 -2 9 6 1.9 ---8 -50 -130 -10 0 11 7.5 2.1 240 240 0 0 0 0 2 13 9 -400 400 8 50 130 10 dB dB k k V mV mV mV mV mV mV 12 14 16 dB Test circuit 2 Test circuit 2 Test circuit 2 Test circuit 2 Test circuit 2 Test circuit 2 Test circuit 2 Test circuit 2 Test circuit 2 Test circuit 2 Test circuit 2 Test circuit 2 6 6 7 8 8 9 10 11 12 13 13 14 IST IBAT ISYS1 ISYS2 ICGVCC BATT=9V, VSYS1=VSYS2=VREF=0V HVCC=0.45V, MUTE34=3.2V HVCC=0.45V, MUTE34=3.2V, EI=0V HVCC=0.45V, MUTE34=3.2V CHGVCC=4.5V, ROUT=OPEN -----0 2.5 3.3 4.1 0.65 3 4.0 4.5 5.5 2.0 A mA mA mA mA Test circuit 1 Test circuit 1 Test circuit 1 Test circuit 1 Test circuit 1 1 2 3 4 5 Symbol Test conditions Min. Typ. Max. Unit Test circuit No
IN pin CH1,3,4 input resistance CH2
Maximum output voltage Lower transistor saturated voltage Upper transistor saturated voltage Input offset voltage
VSATL IO=-300mA, IN=0 and 3.2V VSATU IO=300mA, IN= 0 and 3.2V VOI VOO134 VREF=IN=1.6V VOO2 VDB
Output CH1,3,4 offset voltage CH2
Dead zone
(To be continued)
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SA5901
(Continued)
Characteristics BRAKE1 ON threshold voltage BRAKE1 OFF threshold voltage MUTE2 ON threshold voltage MUTE2 OFF threshold voltage MUTE34 ON threshold voltage
Symbol
Test conditions
Min. Typ. Max. Unit 2.0 -2.0 --2.0 1.2 ----------0.8 -0.8 0.8 --0.8 V V V V V V V V
Test circuit No Test circuit 2 Test circuit 2 Test circuit 2 Test circuit 2 Test circuit 2 Test circuit 2 Test circuit 2 Test circuit 2 Test circuit 2 15 16 17 18 19 20 21 22
VBRON IN1=1.8V VBROFF IN1=1.8V VM2ON IN2=1.8V VM2OFF IN2=1.8V VM34ON IN3=IN4=1.8V
MUTE34 OFF threshold voltage VM34OFF IN3=IN4=1.8V VREF ON threshold voltage VREF OFF threshold voltage VREFON IN1=IN2=IN3=IN4=1.8V VREFOFF IN1=IN2=IN3=IN4=1.8V BRAKE 1pin. The current BRAKE1 break current IBRAKE1 difference between ` and H' `. L' PWM Power supply driving section PSW sink current HVCC level shift voltage HVCC leak current PWM amplifier transfer gain DC/DC converter section Error amplifier section VSYS1 pin threshold E0 pin output voltage H E0 pin output voltage L Short-circuit protection SPRT pin voltage (normal) VSPR EI=1.3V VSITH VEOH VEOL EI=0.7V, IO=-100A EI=1.3V, IO=100A IPSW VSHIF IMLK IN1=2.1V IN1=1.8V, HVCC-OUT1F HVCC=9V, VSYS2=BATT=0V VSYS1-
4
--
10
mA
23
10
13
17
mA V A
Test circuit 2 Test circuit 2 Test circuit 2 Test circuit 2
24 25 26 27
0.35 0.45 0.55 -0 5
GPWM IN1=1.8V, HVCC=1.2~1.4V
1/60 1/50 1/40 1/k
3.05 3.20 3.35 1.4 -1.6 --0.3
V V V
Test circuit 1 Test circuit 1 Test circuit 1 Test circuit 1
28 29 30
--
0
0.1
V
31
(To be continued)
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SA5901
(Continued)
Characteristics SPRT pin current 1 E0=H SPRT pin current 2 OFF=L SPRT voltage) SPRT pin impedance SPRT pin threshold voltage Over-voltage protection detect Transistor driving section pin current 3 (over-
Symbol ISPR1 ISPR2 ISPR3 RSPR
Test conditions EI=0.7V EI=1.3V, OFF=0V EI=1.3V, BATT=9.5V
Min. Typ. Max. Unit 6 12 12 10 20 20 16 32 32 265 A A A k V V
Test circuit No Test circuit 1 Test circuit 1 Test circuit 1 Test circuit 1 Test circuit 1 Test circuit 1 32 33 34 35 36 37
175 220
VSPTH EI=0.7V, CT=0V VHVPR BSEN pin voltage
1.10 1.20 1.30 8.0 8.4 9.0
BATT=CT=1.5V SW pin output voltage 1H VSW1H VSYS1=VSYS2=0V IO=2mA, at starter SW pin output voltage 2H SW pin output voltage 2L VSW2H CT=0V, IO=-10mA, EI=0.7V, SPRT=0V 1.0 1.50 -0.3 -0.45 V V 0.78 0.98 1.13 V
Test circuit 1 Test circuit 1 Test circuit 1 Test circuit 3 Test circuit 3 Test circuit 3 Test circuit 3 Test circuit 3 Test circuit 3 Test circuit 3 Test circuit 1 Test circuit 1
38
39 40
VSW2L CT=2V, IO=10mA CT=470pF,
SW pin oscillating frequency 1
fSW1
VSYS1=VSYS2=0V, at starter
65
80
95
KHz
41
SW pin oscillating frequency 2 SW pin oscillating frequency 3 SW pin minimum pulse width Pulse duty at start Max. pulse duty at seld-runing Max. pulse duty at CLK
fSW2 fSW3 TSWMIN DSW1 DSW2
CT=470pF, CLK=0V CT=470pF CT=470pF, sweep CT=470pF, VSYS1=VSYS2=0V EI=0.7V, CLK=0V CT=470pF, E0=0.50.7V
60 -0.01 40 70 65
70 88.2 -50 80 75
82 --
KHz KHz
42 43 44 45 46 47
0.6 Usec 60 90 85 % % %
synchronization Dead time section DEAD pin impedance DEAD pin output voltage
DSW3 EI=0.7V, CT=470pF
RDEAD VDEAD
52
65
78
K V
48 49
0.78 0.88 0.98
(To be continued)
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SA5901
(Continued)
Characteristics Interface section OFF pin threshold voltage OFF pin bias current
Symbol
Test conditions
Min. Typ. Max. Unit
Test circuit No Test circuit 1 Test circuit 1 Test circuit 1 Test circuit 1 Test circuit 1 Test circuit 3 Test circuit 3 Test circuit 1 Test circuit 1 Test circuit 1 Test circuit 1 Test circuit 3 Test circuit 3 Test circuit 3 Test circuit 3 Test circuit 3 Test circuit 3 Test circuit 3
VOFTH EI=1.3V IOFF OFF=0V
-75 -BAT T-0.3 13 2.0 --
-95 --16 ----
VSYS
1-2.0
V A V V A V V A
50 51 52 53 54 55 56 57
115 BATT -1.0 -19 -0.8 10
START pin ON threshold voltage VSTATH1 VSYS1=VSYS2=0V, CT=2V START pin OFF threshold voltage START pin bias current CLK pin threshold voltage H CLK pin threshold voltage L CLK pin bias current Starter circuit section Starter switching voltage Starter switching hysteresis width Discharge release voltage Empty detection section Empty detection voltage 1 Empty detection voltage 2 VEMPT1 VSEL=0V VEMPT2 ISEL=-2A VSTNM VSYS1=VSYS2=0V3.2V, START=0V VSTATH2 VSYS1=VSYS2=0V, CT=2V ISTART START=0V VCLKTHH VCLKTHL ICLK CLK=3.2V
--
2.3
2.5
2.7 300
V mV V
58 59 60
VSNHS START=0V VDIS
130 200
1.63 1.83 2.03
2.1 1.7 25 25 --17
2.2 1.8 50 50 --2.3
2.3 1.9 100 100 0.5 1.0 27
V V mV mV V A k
61 62 63 64 65 66 67
Empty detection hysteresis width 1 VEMHS1 VSEL=0V Empty detection hysteresis width 2 VEMHS2 ISEL=-2A EMP pin output voltage EMP pin output leak current BSEN pin input resistance VEMP IEMPL IO=1mA, BSEN=1V BSEN=2.4V
RBSEN VSEL=0V
(To be continued)
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SA5901
(Continued)
Characteristics BSEN pin input leak current SEL pin detection voltage SEL pin detection current Reset circuit section VSYS1 reset threshold voltage ratio
Symbol IBSENL VSELTH ISELT
Test conditions VSYS1=VSYS2=0V, BSEN=4.5V VSELTH=BATT-SEL, BSEN=2V
Min. Typ. Max. Unit -1.5 -2 ---1.0 --A V A
Test circuit No Test circuit 3 Test circuit 3 Test circuit 3 Test circuit 3 Test circuit 3 Test circuit 3 Test circuit 3 Test circuit 3 Test circuit 3 Test circuit 3 Test circuit 1 Test circuit 1 Test circuit 1 Test circuit 1 Test circuit 1 Test circuit 1 Test circuit 1 Test circuit 1 68 69 70
HSRT
Ratio of VSYS1 voltage and error-amp threshold voltage
85 25
90 50 -90 --95
95 100 0.5 108
% mV V k
71 72 73 74 75 76 77
Reset detection hysteresis width VRSTHS RESET pin output voltage RESET pin pull up resistance AMUTE pin output voltage 1 AMUTE pin output voltage 2 AMUTE pin pull down resistance Operational amplifier section Input bias current Input offset voltage High level output voltage Low level output voltage Output drive current (source) Output drive current (sink) Open loop voltage gain Slew rate IBIAS VOIOP VOHOP RL=OPEN VOLOP RL=OPEN VSOU ISIN GVO SR Output short to GND by 50 Output short to VSYS by 50 IN=-75dBV, f=1kHz VRST RRST VAMT1 VAMT2 RAMT IO=-1mA, VSYS1=VSYS2=2.8V START=0V IO=1mA, VSYS1=VSYS2=2.8V
-72 BAT T-0.4 T-0.4 77
BATT V BATT V 113 k
IO=-1mA, VSYS1=VSYS2=0V, BAT
--5.5 3.0 --0.4 ---
-0 ---3 0.7 70 0.5
300 5.5 -0.2 -1 ----
nA mV V V mA mA dB V/sec
78 79 80 81 82 83 84 85
(To be continued)
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SA5901
(Continued)
Characteristics Charging circuit section RCHG pin bias voltage RCHG pin output resistance SEL pin leak current 1 SEL pin leak current 2 SEL pin saturated voltage
Symbol
Test conditions
Min. Typ. Max. Unit
Test circuit No Test circuit 1 Test circuit 1 Test circuit 1 Test circuit 1 Test circuit 1
VRCHG RRCHG ISELLK ISELLK VSELCG
CHGVCC=4.5V, RCHG=1.8k CHGVCC=4.5V, RCHG=0.5 and 0.6V CHGVCC=4.5V, RCHG=OPEN CHGVCC=0.6V, RCHG=1.8 k CHGVCC=4.5V, IO=300mA, RCHG=0
0.71 0.81 0.91 0.75 0.95 1.20 -----0.45 1.0 1.0 1.0
V k A A V
86 87 88 89 90
This product is not designed for protection against radioactive rays.
PIN CONFIGURATIONS
POWGND BRAKE1 23 22 IN1 21 MUTE2 20 IN2 19 MUTE34 18 IN4 17 IN3 16 VREF 15 VSYS2 14 OP+ 13 OPOUT 12 VSYS1 1 BSEN 2 BATT 3 RESET 4 DEAD 5 SW 6 EO 7 EI 8 SPRT 9 CT 10 N.C 11 OPOUT1R OUT2R OUT3R OUT4R 24 OUT1F OUT2F OUT3F OUT4F 25
33 AMUTE 34 EMP 35 HVCC 36 PSW 37 CLK 38 START 39 OFF 40 CHGVCC 41 SEL 42 PREGND 43 PWMFIL 44
RCHG
32
31
30
29
28
27
26
SA5901
PIN DESCRIPTION
PIN No. 1 2 3 4 Symbol BSEN BATT RESET DEAD Battery voltage monitor pin Battery power supply input pin Cassette detection output pin Dead-time setting pin
(To be continued)
Description
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SA5901
(Continued)
PIN No. 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44
Symbol SW EO EI SPRT CT NC OPVSYS1 OPOUT OP+ VSYS2 VREF IN3 IN4 MUTE34 IN2 MUTE2 IN1 BRAKE1 OUT4R OUT4F OUT3R OUT3F POWGND OUT2F OUT2R OUT1F OUT1R RCHG AMUTE EMP HVCC PSW CLK START OFF CHGVCC SEL PREGND PWMFLL Booster transistor drive pin Error amplifier output pin Error amplifier input pin
Description
Short-circuit protection setting pin Triangular wave output pin Not connected Operational amplifier negative input pin Control circuit power supply input pin Operational amplifier output pin Operational amplifier positive input pin Pre-driver power supply input pin Reference power supply input pin CH3 control signal input pin CH4 control signal input pin CH3/CH4 mute pin CH2 control signal input pin CH2 mute pin CH1 control signal input pin CH1 brake pin CH4 negative output CH4 positive output CH3 negative output CH3 positive output Power unit power supply ground CH2 positive output CH2 negative output CH1 positive output CH1 negative output Charging current setting pin Reset inversion output pin ` Empty' detection output pin h-bridge power supply input pin PWM transistor drive pin External clock synchronization input pin Boost DC/DC converter starting pin Boost DC/DC converter OFF pin Charging circuit power supply input pin ` Empty' detection level switching pin Pre-unit power supply ground pin PWM phase compensation pin
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SA5901
FUNCTION DESCRIPTION
H-bridge driver (Gain setting) Driver input resistance is 11k (typ.) for CH1, CH3 and CH4 and 7.5 k for CH2. Calculate driver gain with the under-mentioned expression and set it. Ch1, Ch3, Ch4 Ch2
55K GV=20log| 11K +R | (dB) 110K GV=20log| 7.5K +R | (dB)
The power supply of drive output stage is HVCC pin (36-pin) and that of pre-drive circuit is VSYS2 pin (15-pin). Attach by-pass capacitor (approximately 0.1F) to the legs of this IC between the power supplies. (Mute function) Brake function and mute function are assigned to CH1 and other channels of the four channels respectively. When BRAKE1 pin (23-pin) has been set to " , the output of CH1 becomes " for both pin 31 and pin 32, and H" L" enters a brake mode. When MUTE2 pin (21-pin) has been set to " , the output of CH2 is muted. H" When MUTE34 pin (19-pin) has been set to " , the output of CH3 and that of CH4 are muted simultaneously. L" (VREF drop mute) When the voltage impressed to VREF pin (16-pin) is 1.0V (typ.) orless, impedance of driver output becomes ` high" . (Thermal shutdown) When the chip temperature has been 150C(typ.), the output current is cut. When the chip temperature has dropped to 120C(typ.), the output current begins to flow. PWM power supply drive unit This unit detects a maximum output level of drivers of four channels and performs the PWM supply of load drive power supply (36-pin). This unit uses PNP transistor, coil, schottky diode and capacitor as external component.
33 10P 47 44 PWMFIL 37 PSW 47 SBD 36 HVCC 0.1
2200P 100K
DC/DC converter (Output voltage) Booster circuit of 3.2V(typ.) can be configured with external components. This voltage varies depending on addition of external components. How to set the voltage is as follows:
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SA5901
R1 R3 + R2 R4 VSYS1 = 1.20 x R1 +R3 R2 +R4 (V) R2 R4 R2 +R4
(Short-circuit protection function) When the output (6-pin) of error amplifier is " , if the voltage of SPRT pin (8-pin) has reached 1.2V (typ.) upon H" charging the pin, switching of SW pin (5-pin) is disabled. Time to disable switching depends on a capacitor of the SPRT pin (8-pin) and it can be calculated by the under-mentioned expression:
t = CSPRT x VTH (sec)
ISPRT
(VTH = 1.20V, ISPRT = 10 A)
(Soft-start function) The soft-start is functioned by putting a capacitor between DEAD pin (4-pin) and GND. MAX duty can be changed by attaching resistance to 4-pin. t=CDEAD X R (sec) (R=65k) (Power-off operation) SPRT pin (8-pin) is charged by setting OFF pin (40-pin) to " . Then, switching of SW pin (5-pin) is terminated L" when the voltage of the SPRT pin (8-pin) has reached 1.2V (typ.). time to disable switching depends on a capacitor of the SPRT pin (8-pin) and it can be calculated by the under-mentioned expression: t=CSPRT x VTH (sec) (VTH = 1.20V, IOFF = 20uA)
IOFF
(Over-voltage protection operation) When the voltage impressed to BSEN pin (1-pin) has been 8.4V (typ.), SPRT pin (8-pin) is charged. Then, switching of SW pin (5-pin) is terminated when the voltage of the SPRT pin (8-pin) has reached 1.2V (typ.). time to disable switching depends on a capacitor of the SPRT pin (8-pin) and it can be calculated by the undermentioned expression: t=CSPRT x
VTH (sec) IHV
(VTH = 1.20V, IHV = 20uA)
"Empty" detector unit When the voltage impressed to BSEN pin (1-pin) has been the detecting voltage or less, EMP pin (35-pin) varies from " to " (open collector output). Hysteresis of 50mV (typ.) set to the detecting voltage to prevent the output H" L" chattering. The detecting voltage varies depending on SEL pin (42-pin) as follows: SEL pin L High-2 Reset circuit Upon 90% (typ.) of DC/DC converter output voltage, RESET pin (3-pin) varies from " to " and AMUTE pin L" H" (34-pin) changes from " to " . Hysteresis of 50mV(typ.) set to the reset voltage to prevent the output chattering. H" L" Detect voltage 2.2V (Typ.) 1.8V (Typ.) Return voltage 2.25V (Typ.) 1.85V (Typ.)
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SA5901
Charging circuit The power supply of the charging unit is CHGVCC pin (41-pin) and it is independent of any other circuit. Charging current is set by the resistance between RCHG pin (33-pin) and GND. The charging current takes constant current through SEL pin (42-pin). This circuit has a private thermal shutdown circuit. When the chip temperature has been 150C (typ.), the charging current is cut. When the chip temperature has dropped to 120C(typ.), the charging current begins to flow.
TEST CIRCUIT (1)
V RCHG POWGND DEAD SPRT BATT
Table of test circuit 1 switches position Measuring no. 1 2 3 4 5 28 29 30 1 --------2 --------3 -----A A A 4 --B B --B B 5 --------6 --------SW no 7 --------8 --B B ----9 --------10 --------11 ----A ----12 ------13 --------14 ---------
ISYS1
OP-
N.C
SW
EO
CT
EI
~
(To be continued)
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A A A A A A A V
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SA5901
(Continued) Measuring no. 31 32 33 34 35 36 37 38 39 40 48 49 50 51 52 53 54 57 58 59 60 78 79 80 81 82 83 84 85 86 87 88 89 90 1 ----------A A --------A -------------2 -------A A A ----A A --A A --------------3 ----------------------------------4 B B B B -B --B -------------------------5 ----B B --B ---A ---------------------6 -------B B B ------------------------SW no 7 ---------------------B B C A B B B B -----8 ---------------------A C B B C C D C -----9 ---------------------B B B B C A B B -----10 ---------------------------A A -----11 -----------------------------C B A C B 12 -------A ------A A A -A A --------------13 --A ---------A A --------------------14 -------------------------------A A B
--: Switch open. Supplementary explanation of test circuit 1. No. 1 Measure IBAT. No. 2 Measure IBAT No.3 Measure ISYS1
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SA5901
No.4 Measure ISYS2 No.5 Measure ICHGVCC. No. 28 VSYS1 voltage when E0 pin varies from " to " upon increasing VSYS1. H" L" No. 29 E0 pin voltage when 100A has been taken from the E0 pin. No. 30 E0 pin voltage when 100A has flowed into the E0 pin No. 31, 32, 33 &34 measure SPRT pin voltage No. 35 Current flowing when 0.5V has been impressed to SPRT terminal shall be I1, and current flowing when 0.6V has been impressed shall be I2. RSPR= 0.1V ( )
I2 -I1
No. 36 SPRT pin voltage when SW pin varies from " to " upon increasing the SPRT voltage. H" L" No. 37 BSEN pin voltage when SPRT pin varies form " to " upon increasing BSEN voltage and BATT L" H" voltage. No. 38 SW pin voltage when 2mA has been taken from the SW pin. (START=0V) No. 39 SW pin voltage when 10mA has been taken from the SW pin. (CT=SPRT=0V, EI=0.7V) No. 40 SW pin voltage when 10mA has flowed into the SW pin. (CT=2V) No. 48 DEAD pin voltage when 2A has been taken from the DEAD pin shall be DEAD1, and DEAD pin voltage when 4A has been taken shall be DEAD2.
RDEAD = DEAD1-DEAD1
2A
()
No. 49 DEAD pin voltage upon IDEAD=0A. No. 50 OFF pin voltage when SPRT pin varies from " to " upon decreasing the OFF pin. L" H" No. 51 OFF pin outgoing current upon OFF=0V. No. 52 START pin voltage when SW pin varies from " to " upon decreasing the START pin. L" H" No. 53 SW pin shall be " when voltage of BATT-0.5V has been impressed to START pin. L" No. 54 START pin outgoing current upon START=0V No. 57 CLK pin incoming current upon CLK=3.2V No. 58 & 59 VSYS1 voltage when SW pin varies from " to " upon increasing VSYS1 voltage. The voltage L" H" width until SW pin varies " to " upon decreasing VSYS1 from that voltage shall be hysteresis width. H" L" No. 60 VSYS1 voltage when dead pin varies from " to " upon increasing VSYS1 voltage. L" H" No. 78 Calculated from voltage at both ends of RNF=1M. No. 79 Voltage between OP- and OP+ of RNF=0. No. 80 &81 DC voltage at OPOUT pin in inversion amplifier configuration of RNF=20k. No. 82 Calculated voltage at both ends of 50 when short-circuiting OPOUT pin to GND, grounding , with 50 at RNF=0. No. 83 Calculated voltage at both ends of 50 when short-circuiting OPOUT pin to VSYS2, high voltage, with 50 at RNF=0. No. 85 No. 86 Measure RCHG pin voltage when 1.8k has been impressed to RCHG pin and GND. No. 87 Current flowing from this pin when 0.5V has been impressed to RCHG pin shall be IRC1, and current when 0.6V has been impressed shall be IRC2.
RRCHG = 0.1V IRC2 - IRC1 ()
No. 88 & 89 Measure leak current of SEL pin. No. 90 Measure SEL pin voltage when 300mA has been flowed into the SEL pin.
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SA5901
TEST CIRCUIT (2)
OUT1F
OUT2F
OUT3F
OUT4F
RCHG
POWGND
BRAKE1
OUT1R
OUT2R
OUT3R
OUT4R
V V V
BATT
Table 1/2 of test circuit 2 switches position Measuring no. CH1F,R 6 CH2F,R CH3F,R CH4F,R CH1 7 CH2 Ch3 CH4 CH1 8 CH2 CH3 CH4 CH1F,R 9 CH2F,R CH3F,R CH4F,R SW no 1 ----------------2 --B ---B ---B ---B -3 ---B ---B ---B ---B 4 -B ---B ---B ---B --5 B ---B ---B ---B ---6 B B B B B B B B B B B B B B B B 7 B B B B B B B B B B B B B B B B 8 B B B B B B B B B B B B B B B B 9 ----------------10 -----------------
CT
(To be continued)
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V
A
A
A V
A
2006.02.27 Page 15 of 24
SA5901
(Continued) Measuring no. CH1F CH1R CH2F 10 CH2R CH3F CH3R CH4F CH4R CH1F CH1R CH2F 11 CH2R CH3F CH3R CH4F CH4R CH1 12 CH2 CH3 CH4 CH1 13 CH2 CH3 CH4 14 14 15 16 17 18 19 20 CH1 CH2 CH3 CH4 CH1 CH1 Ch2 CH2 CH3 CH4 CH3 CH4 SW no 1 ------------------------------------2 ----B B ------B B ----A ---B ---B -----B -B -3 ------B B ------B B ---A ---B ---B -----B -B 4 --B B ------B B -----A ---B ---B ----B B ----5 B B ------B B ------A ---B ---B ---B B ------6 C A C A C A C A C A C A C A C A ----B B B B B B B B B B B B B B B B 7 A C A C A C A C A C A C A C A C ----B B B B B B B B B B B B B B B B 8 B B B B B B B B B B B B B B B B ----B B B B B B B B B B B B B B B B 9 ------------------------------------10 -------------------------------------
(To be continued)
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SA5901
(Continued) Measuring no. CH1 21 CH2 CH3 CH4 CH1 22 CH2 CH3 CH4 23 24 25 26 27 --: Switch open
VO
SW no 1 ------------A 2 --B ---B ------3 ---B ---B -----4 -B ---B -------5 B ---B ---B B B -B 6 B B B B B B B B B -B B B 7 B B B B B B B B B -B B B 8 B B B B B B B B B B A B B 9 ---------B A --10 ----------A -B
CH1
VO1 VO2
xc' xc VIN4 VIN3
Output offset voltage VIN2 VIN1
VIN
Dead zone VO3 VO4
Voltage gain GVC (+)=20log | GVC (-)=20log |
V 01 - V 02 VIN1 - VIN2 V 03 - V 04 VIN3 - VIN4
| |
Gain error by polarity GVC(+)-GVC(-) Dead zone xc-xc' =
VIN2 V 01 - VIN1 V 02 V 01 - V 02 - VIN3 V 04 - VIN4 V 03 V 03 - V 04
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SA5901
Supplementary explanation of test circuit 2 No.6 Input conditions CH1, 3&4 (VIN1=VREF+0.15V) (VIN2=VREF+0.15V) (VIN3=VREF-0.15V) (VIN4=VREF-0.15V) No. 7 GVC(+)-GVC(-) No. 8 Current flowing when 1.7V has been impressed each driver shall be IRIN1, and current flowing when 1.8V has been impressed shall be IRIN2. No.9 Measure voltage between output F and output R of each driver upon RL=8. (HVCC=BATT=4V) No. 10 Voltage between each output F and GND when 300mA has been flowed into a lower power transistor. (HVCC=BATT=2V) No. 11 Voltage between each output and HVCC when 300mA has been taken from an upper power transistor. (HVCC=BATT=2V) No. 12 Measure voltage between each driver input pin and VREF pin. No. 13 Measure voltage between output F and output R of driver upon short-circuiting between each driver input pin and VREF pin. (RL=8). No. 14 Measure at input conditions of (VIN1=VREF+50mV) (VIN2=VREF+30mV) (VIN3=VREF-50mV) (VIN4=VREF-30mV) No. 15 Output of CH1 shall be 0 when 2.0V has been impressed to BRAKE1 pin. No. 16 Output of CH1 shall be observed completely when 0.8V has been impressed to BRAKE1 pin. No. 17 Output of CH2 shall be 0 when 2.0V has been impressed to MUTE2 pin. No. 18 Output of CH2 shall be observed completely when 0.8V has been impressed to MUTE2 No. 19 Output of CH3 &CH4 shall be 0 when 0.8V has been impressed to MUTE34 pin. No. 20. Output of CH3 &CH4 shall be observed completely when 2.0V has been impressed to MUTE34 pin. No. 21 Each output of driver shall be observed completely when 1.2V has been impressed to VREF pin. No. 22 Each output of driver shall be 0 when 0.8V has been impressed to VREF pin. No. 23 Measure the difference between IBAT upon BRAKE=0V and IBAT upon BRAKE1=3.2V. No. 24 Measure current flowing into PSW pin. No. 25 Difference between OUT1F pin voltage and HVCC pin voltage generated by a switching regulator. No. 26 Measure leak current of HVCC pin. No. 27 When approximately 1V is observed in driver output (OUT1F pin) (VIN1=VREF+0.2V), PWMFIL pin current upon HVCC=1.2V shall be IPWM1 and the current upon HVCC=1.4V shall be IPWM2. (Measure PWMFIL pin at 0.7V.)
GPWM = IPWM1 - IPWM2 0 .2 V (1/ K )
CH2 only (VIN1=VREF+0.10V) (VIN2=VREF+0.05V) (VIN3=VREF-0.10V) (VIN4=VREF-0.05V)
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SA5901
TEST CIRCUIT (3)
Table of test circuit 3 switches position Measuring No. 41 42 43 55 56 44 45 46 1 --------2 A A A A A A A A 3 -----A --4 A A A A A A A A 5 --------SW No 6 --------7 A A B B B B A A 8 B A A A A A B A 9 --------10 ---------
(To be continued)
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SA5901
(Continued)
Measuring No. 47 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 --: Switch open Supplementary explanation of test circuit 1 -----------B B A B B B B 2 A -----------------3 ------------------4 A -----------------5 -----------B B B B B B A
SW No 6 -C C C C B A --C C -------7 B -----------------8 A ---------------B -9 -A B A B --A -A B -------10 -A A A A A A A A A A --------
No. 41 Measure SW pin oscillation frequency upon VSYS1=0V and VSTART=0V. No. 42 Measure SW pin oscillation frequency upon VSYS1=3.2V. No. 43 Measure SW pin oscillation frequency when pulse wave of 88.2kHz has been inputted to CLK pin. No. 44 Measure minimum pulse width outputted to SW pin upon increasing E0 pin voltage from 0.5V.
SW DUTY=(t1/t)x100%
t1 t
TIME
No. 45 Measure SW pin pulse duty upon VSYS1=0V and VSTART=0V. No. 46 Measure SW pin pulse duty upon VSYS1=3.2V and CLK=0V. No. 47 Measure SW pin pulse duty upon VSYS1=3.2V and CLK=88.2kHz. No. 55 &56 Check the synchronization of SW pin when low level of pulse wave inputted to CLK pin has been 0.8V and high level has been 2.0V. No. 61 &63 BSEN pin voltage when EMP pin varies from " to " upon decreasing the BSEN pin voltage H" L" (VSEL=0V). The voltage width until EMP pin varies " to " upon increasing BSEN pin voltage from that voltage shall be L" H" hysteresis width. No. 62 &64 BSEN pin voltage when EMP pin varies from " to " upon decreasing the BSEN pin voltage H" L"
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SA5901
(ISEL=-2A). The voltage width until EMP pin varies " to " upon increasing BSEN pin voltage from that voltage shall be L" H" hysteresis width. No. 65 EMP pin voltage when 1mA has flowed into the EMP pin. No. 66 Measure leak current of EMP pin. No. 67 Current flowing into the BSEN pin when 2.4V has been impressed to this pin shall be IBSEN.
RBSEN = 2 .4 V IBSEN ()
No. 68 Measure leak current of BSEN pin. (VSYS1=0V) No. 69 When 1.5V has been impressed between SEL pin and BATT pin, SEL pin shall judge it as " . L" No. 70 When 2A has been taken from SEL pin, SEL pin shall judge it as " Hi-z" . No. 71 Ratio of VSYS1 voltage and error amplifier threshold voltage when RESET pin varies from " to " L" H" upon increasing VSYS1 voltage. No. 72 Measure VSYS1 voltage when RESET pin varies from " to " upon increasing VSYS1 voltage, L" H" voltage width from VSYS1 until RESET pin varies from " to " upon decreasing VSYS1 voltage. H" L"
RRST = 1.0 V IRESET ()
No. 75 AMUTE pin voltage when 1mA has been taken from the AMUTE pin. No. 76 AMUTE pin voltage when 1mA has been taken from the AMUTE pin upon VSYS1=0V and VSTART=0V. No. 77 Current flowing into AMUTE pin when 1.0V has been impressed to AMUTE pin shall be IAMUTE.
RAMUTE = 1.0 V IAMUTE ()
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SA5901
TYPICAL APPLICATION CIRCUIT
TRAVERSE OUT1R M OUT1F SP INDLE OUT2R OUT3F M OUT2F POWGND FOCUS OUT3R TRACKING OUT4R OUT4F BRAKE1 23 22 IN1
1.8K RCHG 33 AMUTE 34
32
31
30
29
28
27
26
25
24
EMP 33 47
35
21
MUTE2
HVCC 0.1
36
20
IN2
37 47 PSW CLK 38
19
MUTE34
18
IN4
START 39 0.1 OFF 100K CHCVCC 40 17
IN3
SA5901
16 VREF VSYS2
41
15
SEL
42
14
OP+
PREGND
43
13
OPOUT
PWMFIL 100K
44 1 BSEN BATT 2 RESET 3 DEAD 4 5 EO SW 6 8.2K 0.022 VOUT 100 7 SPRT EI 8 CT 9 10 NC 11 OP-
12
VSYS1
2200P
10P
filter
0.1 DC/DC converter aplication
0.1
470P
VIN 47
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SA5901
PACKAGE OUTLINE
QFP-44-10x10-0.8 UNIT: mm
LQFP-44-10x10-0.8
12.00.1 10.000.05 1.400.05
UNIT: mm
0.580.05 0.30 0.8 0.127
HANGZHOU SILAN MICROELECTRONICS CO.,LTD
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SA5901
ATTACHMENT
Revision History Data 2003.04.08 2004.03.09 2004.04.08 2006.02.27 REV 1.0 1.1 1.2 1.3 Original Add " QFP-44-10X10-0.8" Modify the " TEST CIRCUIT(2)" Modify the package of " QFP-44-10X10-0.8" Add the package of " LQFP-44-10X10-0.8" 19 Description Page
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